Stream: zP&C
Time: 11:45 - 12:45
We all want to get the most work done efficiently and reduce our mainframe software costs. An important part of this is ensuring that the processor configuration is as optimal as possible, and processor cache usage is an import part of this. Using available SMF records we can create a z/OS Topology view that can help us to optimize our configuration. We will explore how to view, change and verify that our processor configuration changes are optimal for our environment.
There is currently no attachment for Using Interactive z/OS Topology Views to Optimize Processor Configurations
John Ticic joined IntelliMagic as a consultant in 2008. He started as mainframe systems programmer in 1984 and maintained, tuned, and upgraded a large number of MVS-based systems. John has extensive experience in planning and implementing large XRC and GDPS/PPRC installations. Furthermore, he developed many STK/SUN VSM performance analysis tools. At IntelliMagic he is dedicated to interacting with European customers and prospects, and he helps them gain even more benefits from the IntelliMagic solutions through interactive on-site classes and consulting assignments. He also helps development designing enhancements of the products in the z/OS Disk, z/OS Tape and z/OS Systems areas.
Click here to give some Feedback so we can make it even better next year!