Stream: zP&C
Time: 10:00 - 10:45
In today’s IBM Z world there are many processor configuration options available to provide the capacity requirements for IBM Z and IBM Z Hybrid Cloud. This presentation covers selection considerations and discusses why the performance you realize may differ from the traditional LSPR and tooling.
There is currently no attachment for Pitfalls on Non-traditional Migrations
David has been a part of IBM Z’s Microprocessor and Nest Performance teams, and Microprocessor Design and Verification teams with Poughkeepsie Engineering for ~25 years. In his current role he is a client-facing lab representative for system performance inquiries and critical situations worldwide and co-develops the Large Systems Performance Reference (LSPR) and the MIPS and MSUs ratings. He has led and co-developed five generations of IBM Z core performance models that have helped to shape the hardware designs and supply projection data to brand and marketing. He is an IBM Master Inventor and a co-author of roughly 30 patents.
David has been a part of IBM Z’s Microprocessor and Nest Performance teams, and Microprocessor Design and Verification teams with Poughkeepsie Engineering for ~25 years. In his current role he is a client-facing lab representative for system performance inquiries and critical situations worldwide and co-develops the Large Systems Performance Reference (LSPR) and the MIPS and MSUs ratings. He has led and co-developed five generations of IBM Z core performance models that have helped to shape the hardware designs and supply projection data to brand and marketing. He is an IBM Master Inventor and a co-author of roughly 30 patents.
David has been a part of IBM Z’s Microprocessor and Nest Performance teams, and Microprocessor Design and Verification teams with Poughkeepsie Engineering for ~25 years. In his current role he is a client-facing lab representative for system performance inquiries and critical situations worldwide and co-develops the Large Systems Performance Reference (LSPR) and the MIPS and MSUs ratings. He has led and co-developed five generations of IBM Z core performance models that have helped to shape the hardware designs and supply projection data to brand and marketing. He is an IBM Master Inventor and a co-author of roughly 30 patents.
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