Stream: zP&C
Time: 15:15 - 16:00
This session is for professionals interested in learning more about how z/OS manages and dispatches work between General Purpose Processors (GPs) and Assist Processors such as Z Integrated Information Processors (zIIPs). The session starts with the history and evolution of specialty engine types and goes deeper into usage differences before touching on AI and discussing COBOL (GP)-to-JAVA (zIIP) modernization considerations; it also offers practical and non-obvious insights regarding impacts to application performance and costs. Come and join us for a fascinating session!
Email: rlbales@us.ibm.com
David has been a part of IBM Z’s Microprocessor and Nest Performance teams, and Microprocessor Design and Verification teams with Poughkeepsie Engineering for ~25 years. In his current role he is a client-facing lab representative for system performance inquiries and critical situations worldwide and co-develops the Large Systems Performance Reference (LSPR) and the MIPS and MSUs ratings. He has led and co-developed five generations of IBM Z core performance models that have helped to shape the hardware designs and supply projection data to brand and marketing. He is an IBM Master Inventor and a co-author of roughly 30 patents.
Click here to give some Feedback so we can make it even better next year!